Active matrix type liquid crystal display device and related driving methods

ABSTRACT

An active matrix type liquid crystal display is disclosed. The liquid crystal display comprises a plurality of pixel elements arranged in the form of a matrix. Each of the pixel elements comprises a liquid crystal element and a dynamic memory. The dynamic memory performs consecutively, a first, a second, a third, a forth, a fifth, and a sixth refreshes for inversing a digital output status of the dynamic memory, and an interval between the first and the second refreshes is different from an interval between the third and the forth refreshes, and the interval between the third and the forth refreshes is different from an interval between the fifth and the sixth refreshes.

CROSS REFERENCE TO RELATED APPLICATIONS

This application claims the right of priority based on U.S. ProvisionalApplication No. 61/251,415 entitled “LIQUID CRYSTAL DISPLAY DEVICE ANDRELATED DRIVING METHODS”, filed on Oct. 14, 2009 and Taiwan PatentApplication No. 99133989 filed on Oct. 6, 2010, both of which areincorporated herein by reference.

FIELD OF INVENTION

The present invention relates to a liquid crystal display (LCD) andrelated driving method, particular to a LCD having “memory in pixel” andits related driving method.

BACKGROUND OF THE INVENTION

The MIP (Memory In Pixel) technology has been proposed for including amemory in each pixel, for providing the data written into the pixelwhile the active-matrix type display device is in the static imagedisplay mode. Thus, the data write-in process of the driver can thus besubstituted, and the power-consumption can also be decreased, asdescribed in U.S. Pat. No. 6,897,843 and US Pub. 2002/084463, which isincorporated herein by reference.

Generally, in the MIP technology, for maintaining the data stored in thememory of each pixel, a DRAM (Dynamic Random Access Memory) or a SRAM(Static Random Access Memory) could be used. The SRAM consists of acircuit, which has plural transistors arranged in sequence. The DRAMconsists of a transistor and a capacitor. Thus, the DRAM is preferred inthe respect of minimizing the covering area of the circuit and reducingthe spacing between the pixels. However, for maintaining the smallcharge stored in the capacitor of the DRAM, a refreshing process has tobe executed regularly. An example of the pixel circuit using the DRAMtherein can be found in US Pub. 2007/040785, which is incorporatedherein by reference.

Some more background of MIP technology are described in, for example, USPub. 2010/177083 and US Pub. 2010/110067, which are incorporated hereinby reference.

SUMMARY OF THE INVENTION

One aspect of the present invention is to provide an LCD that can have agradual transition of transmittance/reflectance for the polarityinversion of the liquid crystal.

Another aspect of the present invention is to provide an LCD with a newmanner for the refreshing of DRAM MIP.

Still another aspect of the present invention is to provide an LCD thatcan save power consumption and reduce the flicker visibility at the sametime.

In one embodiment, disclosed is an active matrix type liquid crystaldisplay including a plurality of pixel elements arranged in the form ofa matrix. Each of the pixel elements comprises a liquid crystal element,a source line, a gate line, and a dynamic memory. Disposed at anintersection points of the source line and the gate line, the dynamicmemory performs consecutively, a first, a second, a third, a forth, afifth, and a sixth refreshes for inversing a digital output status ofthe dynamic memory. An interval between the first and the secondrefreshes is different from an interval between the third and the forthrefreshes, and the interval between the third and the forth refreshes isdifferent from an interval between the fifth and the sixth refreshes.Meanwhile, an embodiment also discloses an electronic device includingthe LCD as described above, a driver circuit for driving the dynamicmemory, and a power supply connected to the LCD device to supply powerto the LCD.

In another embodiment, disclosed is a method for driving a dynamicmemory in a pixel of LCD. The method includes: adopting a driver circuitto send a driving signal to the dynamic memory; and in response to thedriving signal, the dynamic memory performing a plurality of refreshesfor inversing a digital output status of the dynamic memory. Thetransmittance/reflectance of the liquid crystal element is controlled bya digital output of the dynamic memory. Further, the plurality ofrefreshes include, consecutively, a first, a second, a third, a forth, afifth, and a sixth refreshes, and an interval between the first and thesecond refreshes, an interval between the third and the forth refreshes,and an interval between the fifth and the sixth refreshes are increasingor decreasing in turn.

The foregoing and other features of the invention will be apparent fromthe following more particular description of embodiment of theinvention.

BRIEF DESCRIPTION OF THE DRAWINGS

The present invention is illustrated by way of example and not intendedto be limited by the figures of the accompanying drawing, in which likenotations indicate similar elements.

FIG. 1A shows a conventional DRAM MIP of a LCD;

FIG. 1B shows the pixel voltage alternation and DRAM refresh in aconventional DRAM MIP;

FIG. 1C shows the pixel voltage alternation and DRAM refresh in anotherconventional DRAM MIP;

FIG. 2 is a block diagram showing a pixel structure of an active matrixtype LCD according to one embodiment of the present invention;

FIG. 3 exemplarily shows several refreshes for the polarity inversionaccording to one embodiment of the present invention;

FIG. 4A shows a DRAM refreshing scheme with PWM according to oneembodiment of the present invention;

FIG. 4B shows a DRAM refreshing scheme with PFM according to oneembodiment of the present invention;

FIG. 4C shows a DRAM refreshing scheme with the combination of PWM andPFM according to one embodiment of the present invention;

FIG. 5 is a diagram of an electronic apparatus according to anembodiment of the present invention;

FIG. 6 illustrates an electronic apparatus according to an embodiment ofthe present invention.

DETAILED DESCRIPTION

FIG. 1A shows a conventional DRAM MIP of a LCD. A control transistor TRcontrolled by a gate line GL supplies the data from a source line SL toone end of a liquid crystal cell LQ, and the other end thereof isconnected to a common electrode Com. A DRAM cell is connected to aconnecting point between the control transistor TR and the liquidcrystal cell LQ. The DRAM cell is configured to store the data suppliedto the liquid crystal cell LQ. Therefore, when the image does not vary,the transmittance/reflectance of the liquid crystal cell using thestored data can be kept in the same status.

DRAM MIP requires periodic refresh to maintain the stored memory, andthe output signal polarity is flipped in every refreshing period. Thisoutput voltage is applied to the pixel electrode. Conventionally theinterval of pixel voltage alternation and DRAM refresh period are thesame. Also the pixel has a common electrode and the voltage on this isflipped in the same frequency as the pixel refreshing frequency. Thepixel voltage polarity is flipped in every DRAM MIP refreshing interval,as shown in FIG. 1B.

Another conventional method for diving DRAM MIP is shown in FIG. 1C,where the DRAM has once refresh or twice refreshes in a short intervalperiodically, and the a refreshing frequency of the twice refreshing inthe short interval is higher than an inversing frequency of the oncerefreshing which inverses the voltage polarity applied to the liquidcrystal cells. As shown, the refreshing frequency of the DRAMcorresponds to the maintenance of the memory content, and the refreshingrequired for the pixel, i.e., the polarity inversion, is used to preventthe image sticking effect. Therefore, the refreshing required for thepixel has not to be executed so frequently as the refreshing of theDRAM. The refreshing frequencies therefore the pixel and the DRAM neednot to be identical.

FIG. 2 is a block diagram showing a pixel structure of an active matrixtype LCD according to one embodiment of the present invention. Theactive matrix type LCD 10 comprises a plurality of pixel elementsarranged in the form of a matrix, wherein the pixel elements comprise aplurality of liquid crystal elements LQ, at least one dynamic memory(DRAM) 1. Disposed at the intersection points of a plurality of sourcelines SL and a plurality of gate lines GL, the DRAM 1, in response tothe driving signal DS from a driver circuit 2 (shown in FIG. 5),periodically performs refreshing for inversing the output status of theDRAM 1, wherein the transmittance/reflectance of each of the liquidcrystal elements LQ is controlled by a digital output of the DRAM 1.

Referring back to FIG. 1C, the conventional driving manner adopts asingle refresh to inverse the voltage polarity applied to the liquidcrystal cell, to prevent the image sticking effect, while the quicktwice refreshes before or after that single refresh have nothing to dowith the voltage polarity. Because opposite polarity actually result inslight but still perceivable transmittance/reflectance change of theliquid crystal, this manner would result in sudden intensity change oflight and would be easy to perceive by human eyes. By contrast, the DRAM1 shown in FIG. 2 performs two or more refreshes in a short period forthe polarity inversion to have a gradual transition of thetransmittance/reflectance.

Take FIG. 3 as an example. If the polarity inversion needs a voltageflip from a high level to a low level, instead of having only singlerefresh for a sudden inversion, the DRAM 1 provides a gradual inversion,by having some quick voltage flip (e.g., refreshes R1-R7) back and forthseveral times and, each time increasing the intervals (T1-T3) of the lowlevel and decreasing the intervals (t1-t3) of the high level, until thepolarity is completely inversed. Note that in the example in FIG. 3, thefirst two refreshes R1-R2 (and the interval T1) and the last two refreshR6-R7 (and the interval t3) may have no or little effect on polarityinversion, just as the twice refreshes in a short interval shown in FIG.1C, but at least the middle three refreshes R3-R5 (and the intervals T2and t2) will result in a more gradual polarity transition than thesingle refresh shown in FIG. 1C.

From the example above, it will always take DRAM 1 odd number of flips(refreshes) to achieve a complete polarity inversion. Also relevant tothe present invention, the intervals of the low level (or the intervalsof the high level) before the complete polarity inversion are defined byeven number of flips (refreshes). In FIG. 3, to gradually have longerintervals of the low level as defined by 6 refreshes R1-R6, DRAM 1 hasthe interval T2 between the refreshes R3-R4 longer than the interval T1between the refreshes R1-R2, and also have the interval T3 between therefreshes R5-R6 longer than the interval T2 between the refreshes R3-R4;on the other hand, to gradually have shorter intervals of the high levelas defined by 6 refreshes R2-R7, DRAM 1 has the interval t2 between therefreshes R4-R5 shorter than the interval t1 between the refreshesR2-R3, and also have the interval t3 between the refreshes R6-R7 shorterthan the interval t2 between the refreshes R4-R5.

The increasing of intervals T1-T3 is preferably, but not necessarily,corresponding to the decreasing of intervals t1-t3. Intervals t1-t3could maintain as the same or are even increasing but should be slowerthan the increasing of intervals T1-T3.

The sum of intervals T1 and t1, the sum of intervals T2 and t2, the sumof intervals T3 and t3 could be the same or different or changingaccording to a predetermined manner. For example, the sum of intervalsT2 and t2 could be longer or shorter than the sum of intervals T1 and t1or the sum of intervals T3 and t2, while the sum of intervals T1 and t1could be the same as or different from the sum of intervals T3 and t3.

Note that because of the viscosity of liquid crystal, the polaritycannot be completely inversed if the intervals of the low levelaccumulated in a given period of time are not longer enough, but theabove driving manner is still useful for the DRAM refreshing. If this isa case, intervals T1-T3 are not necessarily increasing as long as theinterval T1 is different from the interval T2, and the interval T2 isdifferent from the interval T3. Similarly, intervals t1-t3 are notnecessarily decreasing as long as the interval t1 is different from theinterval t2 and the interval t2 is different from the interval t3.Intervals T1-T3 and intervals t1-t3 could be altered respectively in anyspecified manner to save power consumption, for example, or for anyother practical purposes.

In the following three embodiments are provided to explain how to haveseveral refreshes, instead of only single refresh, for a gradualpolarity inversion. In each embodiment, for the exemplary purpose, DRAM1 performs 55 refreshes with 27 intervals of the low level and 27intervals of the high level, to complete the polarity inversion. Just asthe example in FIG. 3, the first and the last several refreshes may haveno or little effect on polarity inversion, just as the twice refreshesin a short interval shown in FIG. 1C.

These 55 refreshes will make the voltage level in a form of square wavewith 27 pulses. Note that the invention does not like to limit thenumber of the refreshes for the polarity inversion as long as it takesmore than one refresh. Also in practice the voltage of the square wavecould be set at 5 volt and the frequency is around 60 Hz.

First Embodiment

In the first embodiment, the square wave will be modulated in pulsewidth modulation (PWM), which changes duty ratio gradually but maintainsthe frequency, as characterized below in Table 1. The square wave of asimilar embodiment modulated in PWM is further illustrated in FIG. 4A.In this manner, there is no power increase compared with conventionalstandard burst MIP drive, because there is no change in carrierfrequency. However very small visible optical transient may be stillvisible because human eye sensitivity is still high in such lowfrequency.

TABLE 1 Period Low High Normalized Duty ratio n T (n) t (n) freq. (a.u.)of Low [%] 1 1 19 1 5 2 1 19 1 5 3 1 19 1 5 4 1 19 1 5 5 1 19 1 5 6 2 181 10 7 3 17 1 15 8 4 16 1 20 9 5 15 1 25 10 6 14 1 30 11 7 13 1 35 12 812 1 40 13 9 11 1 45 14 10 10 1 50 15 11 9 1 55 16 12 8 1 60 17 13 7 165 18 14 6 1 70 19 15 5 1 75 20 16 4 1 80 21 17 3 1 85 22 18 2 1 90 2319 1 1 95 24 19 1 1 95 25 19 1 1 95 26 19 1 1 95 27 19 1 1 95

Second Embodiment

In the second embodiment, the square wave will be modulated in pulsefrequency modulation (PFM), which changes frequency gradually butmaintains the duty ratio except a sudden change complementarily once, ascharacterized below in Table 2. The square wave of a similar embodimentmodulated in PFM is illustrated in FIG. 4B. In this manner, powerconsumption is little increased because this driving has periodic highfrequency drive. Furthermore very small visible optical transient couldbe still visible, because duty cycle is steeply changed at maximizedfrequency timing point.

TABLE 2 Period Low High Normalized Duty ratio n T (n) t (n) freq. (a.u.)of Low 1 1 19 1.0 5 2 1 19 1.0 5 3 1 19 1.0 5 4 1 19 1.0 5 5 1 19 1.0 56 0.9 17 1.1 5 7 0.8 15 1.3 5 8 0.7 13 1.4 5 9 0.6 11 1.7 5 10 0.5 9.52.0 5 11 0.4 7.6 2.5 5 12 0.3 5.7 3.3 5 13 0.2 3.8 5.0 5 14 0.1 1.9 10.05 15 1.9 0.1 10.0 95 16 3.8 0.2 5.0 95 17 5.7 0.3 3.3 95 18 7.6 0.4 2.595 19 9.5 0.5 2.0 95 20 11.4 0.6 1.7 95 21 13.3 0.7 1.4 95 22 15.2 0.81.3 95 23 17.1 0.9 1.1 95 24 19 1 1.0 95 25 19 1 1.0 95 26 19 1 1.0 9527 19 1 1.0 95

Third Embodiment

In the third embodiment, the square wave will be modulated in combiningPWM and PFM, which changes both the frequency and the duty ratio, ascharacterized below in Table 3. The square wave of a similar embodimentmodulated in combining PWM and PFM is illustrated in FIG. 4C. In thismanner, the human eyes detectability of optical change is smaller athigh frequency with slow transient of flicker. This is the similarapproach as field-sequential to show slow colour change with discretecolour patterns, as described in T. Järvenpää, “Measuring color breakupof stationary images in field-sequential color displays,” SID 04 Digest,7-2, which is incorporated herein by reference.

TABLE 3 Period Low High Normalized Duty ratio n T (n) t (n) freq. (a.u.)of Low 1 1 19 1.0 5.0 2 1 19 1.0 5.0 3 1 19 1.0 5.0 4 1 19 1.0 5.0 5 119 1.0 5.0 6 1 17 1.1 5.6 7 1 15 1.3 6.3 8 1 13 1.4 7.1 9 1 11 1.7 8.310 1 9 2.0 10.0 11 1 7 2.5 12.5 12 1 5 3.3 16.7 13 1 3 5.0 25.0 14 1 110.0 50.0 15 3 1 5.0 75.0 16 5 1 3.3 83.3 17 7 1 2.5 87.5 18 9 1 2.090.0 19 11 1 1.7 91.7 20 13 1 1.4 92.9 21 15 1 1.3 93.8 22 17 1 1.1 94.423 19 1 1.0 95.0 24 19 1 1.0 95.0 25 19 1 1.0 95.0 26 19 1 1.0 95.0 2719 1 1.0 95.0

FIG. 5 is a diagram of an electronic apparatus 200 according to anembodiment of the present invention. The electronic apparatus 200 has adriver circuit 2 and a power supply 20 connected to the LCD 10 to supplypower to the LCD 10. The driver circuit 2 could be implemented as asemiconductor based logic circuit built in a source driver IC mounted onthe side of LCD 10 or attached on a flexible print circuit board (FPC).In this embodiment, the LCD 10 is a color or monochromic image displayintegrated into the electronic apparatus 200.

Further shown in FIG. 6, the electronic apparatus 200 is shown as alaptop, the electronic apparatus 200 can alternatively be an electronicapparatus such as a mobile phone, a digital camera, a personal digitalassistant (PDA), a notebook computer, a desktop computer, a television,a car media player, a portable video player, a GPS device, an avionicsdisplay or a digital photo frame.

The invention is applicable to various kinds of active matrix displaydevices and pixel circuits similar to those described above could beused in display devices other than AMLCD and AMLEDs where it isdesirable to store a static image, for example in electrochromic,electrophoretic and electroluminescent type display devices. An exampleof an active matrix LED display device is described in EP-1116205 whosewhole contents are incorporated herein as background material.

While this invention has been described with reference to theillustrative embodiments, these descriptions should not be construed ina limiting sense. Various modifications of the illustrative embodiment,as well as other embodiments of the invention, will be apparent uponreference to these descriptions. It is therefore contemplated that theappended claims will cover any such modifications or embodiments asfalling within the true scope of the invention and its legalequivalents.

1. An active matrix type liquid crystal display (LCD), comprising; aplurality of pixel elements arranged in the form of a matrix, whereineach pixel element comprises: a liquid crystal element; a source line; agate line; a dynamic memory disposed at an intersection points of saidsource line and said gate line to perform periodically a plurality ofrefreshes for inversing a digital output status of said dynamic memory;wherein said plurality of refreshes comprise, consecutively, at least, afirst, a second, a third, a forth, a fifth, and a sixth refreshes;wherein an interval between said first and said second refreshes isdifferent from an interval between said third and said forth refreshes,and said interval between said third and said forth refreshes isdifferent from an interval between said fifth and said sixth refreshes.2. The LCD according to claim 1, wherein said dynamic memory performsmore than one and odd number of refreshes to inverse the polarity ofsaid liquid crystal element.
 3. The LCD according to claim 1, wherein aninterval between said first and said third refreshes is different froman interval between said third and said fifth refreshes.
 4. The LCDaccording to claim 1, wherein an interval between said first and saidthird refreshes is the same as an interval between said third and saidfifth refreshes.
 5. The LCD according to claim 1, wherein a ratio ofsaid interval between said first and said second refreshes to aninterval between said first and said third refreshes is different from aratio of said interval between said third and said forth refreshes to aninterval between said third and said fifth refreshes.
 6. The LCDaccording to claim 1, wherein a ratio of said interval between saidfirst and said second refreshes to an interval between said first andsaid third refreshes is the same as a ratio of said interval betweensaid third and said forth refreshes to an interval between said thirdand said fifth refreshes.
 7. The LCD according to claim 1, whereinintervals among said first, said second, said third, said forth, saidfifth, and said sixth refreshes are modulated in pulse width modulation(PWM).
 8. The LCD according to claim 1, wherein intervals among saidfirst, said second, said third, said forth, said fifth, and said sixthrefreshes are modulated in pulse frequency modulation (PFM).
 9. The LCDaccording to claim 1, wherein intervals among said first, said second,said third, said forth, said fifth, and said sixth refreshes aremodulated in combining PWM and PFM.
 10. The LCD according to claim 1,wherein said interval between said first and said second refreshes, saidinterval between said third and said forth refreshes, and said intervalbetween said fifth and said sixth refreshes are increasing or decreasingin turn.
 11. A method to drive a dynamic memory in the LCD according toclaim 1, comprising: adopting a driver circuit to send a driving signalto said dynamic memory; and in response to said driving signal, saiddynamic memory performing a plurality of refreshes for inversing adigital output status of said dynamic memory, wherein thetransmittance/reflectance of said liquid crystal element is controlledby a digital output of said dynamic memory; wherein said plurality ofrefreshes comprise, consecutively, at least, a first, a second, a third,a forth, a fifth, and a sixth refreshes; wherein an interval betweensaid first and said second refreshes, an interval between said third andsaid forth refreshes, and an interval between said fifth and said sixthrefreshes are increasing or decreasing in turn.
 12. The method accordingto claim 11, wherein said dynamic memory performs more than one and oddnumber of refreshes to inverse the polarity of said liquid crystalelement.
 13. The method according to claim 11, wherein an intervalbetween said first and said third refreshes is different from aninterval between said third and said fifth refreshes.
 14. The methodaccording to claim 11, wherein an interval between said first and saidthird refreshes is the same as an interval between said third and saidfifth refreshes.
 15. The method according to claim 11, wherein a ratioof said interval between said first and said second refreshes to aninterval between said first and said third refreshes is different from aratio of said interval between said third and said forth refreshes to aninterval between said third and said fifth refreshes.
 16. The methodaccording to claim 11, wherein a ratio of said interval between saidfirst and said second refreshes to an interval between said first andsaid third refreshes is the same as a ratio of said interval betweensaid third and said forth refreshes to an interval between said thirdand said fifth refreshes.
 17. The method according to claim 11, whereinintervals among said first, said second, said third, said forth, saidfifth, and said sixth refreshes are modulated in pulse width modulation(PWM).
 18. The method according to claim 11, wherein intervals amongsaid first, said second, said third, said forth, said fifth, and saidsixth refreshes are modulated in pulse frequency modulation (PFM). 19.The method according to claim 11, wherein intervals among said first,said second, said third, said forth, said fifth, and said sixthrefreshes are modulated in combining PWM and PFM.
 20. An electronicdevice, comprising: the LCD according to claim 1; a driver circuit fordriving said dynamic memory; and a power supply connected to the LCD tosupply power to the LCD.